Removal of Impulse Noise Using Eodt with Pipelined ADC
نویسنده
چکیده
Corrupted Image and video signals due to impulse noise during the process of signal acquisition and transmission can be corrected. In this paper the effective removal of impulse noise using EODT with pipelined architecture and its VLSI implementation is presented. Proposed technique uses the denoising techniques such as Edge oriented Denoising technique (EODT) which uses 7 stage pipelined ADC for scheduling. This design requires only low computational complexity and two line memory buffers. It’s hardware cost is quite low. Compared with previous VLSI implementations, our design achieves better image quality with less hardware cost. The Verilog code is successfully implemented by using FPGA Spatron-3 family.
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